b1f21329d4
Qualcomm IPQ40xx SoC-s have a variant of QCA8337N switch built-in. It shares most of the stuff with its external counterpart, however it is modified for the SoC. Namely, it doesn't have second CPU port (Port 6), so it has 6 ports instead of 7. It also has no built-in PHY-s but rather requires external PSGMII based companion PHY-s (QCA8072 and QCA8075) for which it first needs to carry out calibration before using them. PSGMII has a SoC built-in PHY that is used to connect to the PHY-s which unfortunately requires some magic values as the datasheet doesnt document the bits that are being set or the register at all. Since its built-in it is MMIO like other peripherals and doesn't have its own MDIO bus but depends on the SoC provided one. CPU connection is at Port 0 and it uses some kind of a internal connection and no traditional RGMII/SGMII. It also doesn't use in-band tagging like other qca8k switches so a shinfo based tagger is used. This is based on the current OpenWrt qca8k version that has been imported from generic target. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
62 lines
2.3 KiB
Diff
62 lines
2.3 KiB
Diff
From c66863c1ba8995b61e6d727d78a241c734f5bb57 Mon Sep 17 00:00:00 2001
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From: Robert Marko <robert.marko@sartura.hr>
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Date: Thu, 1 Oct 2020 15:05:35 +0200
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Subject: [PATCH] dt-bindings: net: add QCA807x PHY
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Add DT bindings for Qualcomm QCA807x PHY series.
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Signed-off-by: Robert Marko <robert.marko@sartura.hr>
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---
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include/dt-bindings/net/qcom-qca807x.h | 45 ++++++++++++++++++++++++++
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1 file changed, 45 insertions(+)
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create mode 100644 include/dt-bindings/net/qcom-qca807x.h
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--- /dev/null
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+++ b/include/dt-bindings/net/qcom-qca807x.h
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@@ -0,0 +1,45 @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
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+/*
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+ * Device Tree constants for the Qualcomm QCA807X PHYs
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+ */
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+
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+#ifndef _DT_BINDINGS_QCOM_QCA807X_H
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+#define _DT_BINDINGS_QCOM_QCA807X_H
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+
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+#define PSGMII_QSGMII_TX_DRIVER_140MV 0
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+#define PSGMII_QSGMII_TX_DRIVER_160MV 1
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+#define PSGMII_QSGMII_TX_DRIVER_180MV 2
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+#define PSGMII_QSGMII_TX_DRIVER_200MV 3
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+#define PSGMII_QSGMII_TX_DRIVER_220MV 4
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+#define PSGMII_QSGMII_TX_DRIVER_240MV 5
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+#define PSGMII_QSGMII_TX_DRIVER_260MV 6
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+#define PSGMII_QSGMII_TX_DRIVER_280MV 7
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+#define PSGMII_QSGMII_TX_DRIVER_300MV 8
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+#define PSGMII_QSGMII_TX_DRIVER_320MV 9
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+#define PSGMII_QSGMII_TX_DRIVER_400MV 10
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+#define PSGMII_QSGMII_TX_DRIVER_500MV 11
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+/* Default value */
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+#define PSGMII_QSGMII_TX_DRIVER_600MV 12
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+
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+/* Full amplitude, full bias current */
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+#define QCA807X_CONTROL_DAC_FULL_VOLT_BIAS 0
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+/* Amplitude follow DSP (amplitude is adjusted based on cable length), half bias current */
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+#define QCA807X_CONTROL_DAC_DSP_VOLT_HALF_BIAS 1
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+/* Full amplitude, bias current follow DSP (bias current is adjusted based on cable length) */
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+#define QCA807X_CONTROL_DAC_FULL_VOLT_DSP_BIAS 2
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+/* Both amplitude and bias current follow DSP */
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+#define QCA807X_CONTROL_DAC_DSP_VOLT_BIAS 3
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+/* Full amplitude, half bias current */
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+#define QCA807X_CONTROL_DAC_FULL_VOLT_HALF_BIAS 4
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+/* Amplitude follow DSP setting; 1/4 bias current when cable<10m,
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+ * otherwise half bias current
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+ */
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+#define QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS 5
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+/* Full amplitude; same bias current setting with “010” and “011”,
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+ * but half more bias is reduced when cable <10m
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+ */
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+#define QCA807X_CONTROL_DAC_FULL_VOLT_HALF_BIAS_SHORT 6
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+/* Amplitude follow DSP; same bias current setting with “110”, default value */
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+#define QCA807X_CONTROL_DAC_DSP_VOLT_HALF_BIAS_SHORT 7
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+
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+#endif
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