88bf652525
Reorganize dtsi patches with upstream version and drop dtsi in 5.15 files. Also add an additional upstream patch for hwspinlock support. Refresh all the dts with needed changes. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
68 lines
1.8 KiB
Diff
68 lines
1.8 KiB
Diff
From d883a12a547b6d42e795ff3b5ac87cfd013b5423 Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Thu, 7 Jul 2022 03:09:36 +0200
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Subject: [PATCH 2/8] ARM: dts: qcom: ipq8064: add gsbi6 missing definition
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Add gsbi6 missing definition for ipq8064.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Tested-by: Jonathan McDowell <noodles@earth.li>
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Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Link: https://lore.kernel.org/r/20220707010943.20857-3-ansuelsmth@gmail.com
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---
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arch/arm/boot/dts/qcom-ipq8064.dtsi | 43 +++++++++++++++++++++++++++++
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1 file changed, 43 insertions(+)
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--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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@@ -663,6 +663,49 @@
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};
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};
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+ gsbi6: gsbi@16500000 {
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+ compatible = "qcom,gsbi-v1.0.0";
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+ reg = <0x16500000 0x100>;
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+ cell-index = <6>;
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+ clocks = <&gcc GSBI6_H_CLK>;
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+ clock-names = "iface";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges;
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+
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+ syscon-tcsr = <&tcsr>;
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+
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+ status = "disabled";
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+
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+ gsbi6_i2c: i2c@16580000 {
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+ compatible = "qcom,i2c-qup-v1.1.1";
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+ reg = <0x16580000 0x1000>;
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+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
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+
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+ clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
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+ clock-names = "core", "iface";
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+
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ status = "disabled";
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+ };
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+
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+ gsbi6_spi: spi@16580000 {
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+ compatible = "qcom,spi-qup-v1.1.1";
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+ reg = <0x16580000 0x1000>;
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+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
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+
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+ clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
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+ clock-names = "core", "iface";
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+
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ status = "disabled";
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+ };
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+ };
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+
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gsbi7: gsbi@16600000 {
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status = "disabled";
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compatible = "qcom,gsbi-v1.0.0";
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