08d8a3646b
These patches have been accepted for linux v5.13. External interrupts not supported for now. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
270 lines
7.0 KiB
Diff
270 lines
7.0 KiB
Diff
From fd22635f222f44dcb4dd6382d97de13144edad2b Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
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Date: Wed, 24 Mar 2021 09:19:16 +0100
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Subject: [PATCH 15/22] dt-bindings: add BCM6368 GPIO sysctl binding
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documentation
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Add binding documentation for the GPIO sysctl found in BCM6368 SoCs.
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Reviewed-by: Rob Herring <robh@kernel.org>
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Link: https://lore.kernel.org/r/20210324081923.20379-16-noltari@gmail.com
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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---
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.../mfd/brcm,bcm6368-gpio-sysctl.yaml | 246 ++++++++++++++++++
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1 file changed, 246 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml
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@@ -0,0 +1,246 @@
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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+%YAML 1.2
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+---
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+$id: http://devicetree.org/schemas/mfd/brcm,bcm6368-gpio-sysctl.yaml#
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+$schema: http://devicetree.org/meta-schemas/core.yaml#
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+
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+title: Broadcom BCM6368 GPIO System Controller Device Tree Bindings
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+
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+maintainers:
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+ - Álvaro Fernández Rojas <noltari@gmail.com>
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+ - Jonas Gorski <jonas.gorski@gmail.com>
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+
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+description:
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+ Broadcom BCM6368 SoC GPIO system controller which provides a register map
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+ for controlling the GPIO and pins of the SoC.
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+
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+properties:
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+ "#address-cells": true
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+
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+ "#size-cells": true
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+
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+ compatible:
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+ items:
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+ - const: brcm,bcm6368-gpio-sysctl
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+ - const: syscon
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+ - const: simple-mfd
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+
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+ ranges:
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+ maxItems: 1
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+
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+ reg:
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+ maxItems: 1
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+
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+patternProperties:
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+ "^gpio@[0-9a-f]+$":
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+ # Child node
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+ type: object
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+ $ref: "../gpio/brcm,bcm6345-gpio.yaml"
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+ description:
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+ GPIO controller for the SoC GPIOs. This child node definition
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+ should follow the bindings specified in
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+ Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml.
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+
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+ "^pinctrl@[0-9a-f]+$":
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+ # Child node
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+ type: object
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+ $ref: "../pinctrl/brcm,bcm6368-pinctrl.yaml"
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+ description:
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+ Pin controller for the SoC pins. This child node definition
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+ should follow the bindings specified in
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+ Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml.
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+
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+required:
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+ - "#address-cells"
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+ - compatible
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+ - ranges
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+ - reg
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+ - "#size-cells"
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+
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+additionalProperties: false
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+
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+examples:
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+ - |
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+ syscon@10000080 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "brcm,bcm6368-gpio-sysctl", "syscon", "simple-mfd";
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+ reg = <0x10000080 0x80>;
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+ ranges = <0 0x10000080 0x80>;
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+
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+ gpio@0 {
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+ compatible = "brcm,bcm6368-gpio";
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+ reg-names = "dirout", "dat";
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+ reg = <0x0 0x8>, <0x8 0x8>;
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+
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+ gpio-controller;
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+ gpio-ranges = <&pinctrl 0 0 38>;
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+ #gpio-cells = <2>;
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+ };
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+
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+ pinctrl: pinctrl@18 {
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+ compatible = "brcm,bcm6368-pinctrl";
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+ reg = <0x18 0x4>, <0x38 0x4>;
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+
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+ pinctrl_analog_afe_0: analog_afe_0-pins {
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+ function = "analog_afe_0";
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+ pins = "gpio0";
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+ };
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+
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+ pinctrl_analog_afe_1: analog_afe_1-pins {
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+ function = "analog_afe_1";
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+ pins = "gpio1";
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+ };
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+
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+ pinctrl_sys_irq: sys_irq-pins {
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+ function = "sys_irq";
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+ pins = "gpio2";
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+ };
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+
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+ pinctrl_serial_led: serial_led-pins {
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+ pinctrl_serial_led_data: serial_led_data-pins {
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+ function = "serial_led_data";
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+ pins = "gpio3";
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+ };
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+
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+ pinctrl_serial_led_clk: serial_led_clk-pins {
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+ function = "serial_led_clk";
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+ pins = "gpio4";
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+ };
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+ };
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+
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+ pinctrl_inet_led: inet_led-pins {
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+ function = "inet_led";
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+ pins = "gpio5";
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+ };
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+
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+ pinctrl_ephy0_led: ephy0_led-pins {
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+ function = "ephy0_led";
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+ pins = "gpio6";
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+ };
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+
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+ pinctrl_ephy1_led: ephy1_led-pins {
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+ function = "ephy1_led";
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+ pins = "gpio7";
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+ };
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+
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+ pinctrl_ephy2_led: ephy2_led-pins {
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+ function = "ephy2_led";
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+ pins = "gpio8";
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+ };
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+
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+ pinctrl_ephy3_led: ephy3_led-pins {
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+ function = "ephy3_led";
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+ pins = "gpio9";
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+ };
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+
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+ pinctrl_robosw_led_data: robosw_led_data-pins {
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+ function = "robosw_led_data";
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+ pins = "gpio10";
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+ };
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+
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+ pinctrl_robosw_led_clk: robosw_led_clk-pins {
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+ function = "robosw_led_clk";
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+ pins = "gpio11";
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+ };
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+
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+ pinctrl_robosw_led0: robosw_led0-pins {
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+ function = "robosw_led0";
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+ pins = "gpio12";
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+ };
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+
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+ pinctrl_robosw_led1: robosw_led1-pins {
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+ function = "robosw_led1";
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+ pins = "gpio13";
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+ };
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+
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+ pinctrl_usb_device_led: usb_device_led-pins {
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+ function = "usb_device_led";
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+ pins = "gpio14";
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+ };
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+
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+ pinctrl_pci: pci-pins {
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+ pinctrl_pci_req1: pci_req1-pins {
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+ function = "pci_req1";
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+ pins = "gpio16";
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+ };
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+
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+ pinctrl_pci_gnt1: pci_gnt1-pins {
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+ function = "pci_gnt1";
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+ pins = "gpio17";
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+ };
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+
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+ pinctrl_pci_intb: pci_intb-pins {
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+ function = "pci_intb";
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+ pins = "gpio18";
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+ };
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+
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+ pinctrl_pci_req0: pci_req0-pins {
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+ function = "pci_req0";
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+ pins = "gpio19";
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+ };
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+
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+ pinctrl_pci_gnt0: pci_gnt0-pins {
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+ function = "pci_gnt0";
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+ pins = "gpio20";
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+ };
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+ };
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+
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+ pinctrl_pcmcia: pcmcia-pins {
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+ pinctrl_pcmcia_cd1: pcmcia_cd1-pins {
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+ function = "pcmcia_cd1";
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+ pins = "gpio22";
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+ };
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+
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+ pinctrl_pcmcia_cd2: pcmcia_cd2-pins {
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+ function = "pcmcia_cd2";
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+ pins = "gpio23";
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+ };
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+
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+ pinctrl_pcmcia_vs1: pcmcia_vs1-pins {
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+ function = "pcmcia_vs1";
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+ pins = "gpio24";
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+ };
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+
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+ pinctrl_pcmcia_vs2: pcmcia_vs2-pins {
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+ function = "pcmcia_vs2";
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+ pins = "gpio25";
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+ };
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+ };
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+
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+ pinctrl_ebi_cs2: ebi_cs2-pins {
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+ function = "ebi_cs2";
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+ pins = "gpio26";
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+ };
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+
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+ pinctrl_ebi_cs3: ebi_cs3-pins {
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+ function = "ebi_cs3";
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+ pins = "gpio27";
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+ };
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+
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+ pinctrl_spi_cs2: spi_cs2-pins {
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+ function = "spi_cs2";
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+ pins = "gpio28";
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+ };
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+
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+ pinctrl_spi_cs3: spi_cs3-pins {
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+ function = "spi_cs3";
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+ pins = "gpio29";
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+ };
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+
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+ pinctrl_spi_cs4: spi_cs4-pins {
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+ function = "spi_cs4";
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+ pins = "gpio30";
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+ };
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+
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+ pinctrl_spi_cs5: spi_cs5-pins {
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+ function = "spi_cs5";
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+ pins = "gpio31";
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+ };
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+
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+ pinctrl_uart1: uart1-pins {
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+ function = "uart1";
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+ group = "uart1_grp";
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+ };
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+ };
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+ };
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