This patch fixes a kernel warning that got triggered by 4.19 because of a bad/missing interrupt level definition in the DTS. | WARNING: CPU: 2 PID: 1996 at drivers/irqchip/irq-gic.c:1016 | CPU: 2 PID: 1996 Comm: kmodloader Not tainted 4.19.9 #0 | Hardware name: Generic DT based system | [<c0317884>] (warn_slowpath_null) from [<c04f9cd0>] | [<c04f9cd0>] (gic_irq_domain_translate) from [<c035af30>] | [<c035af30>] (irq_create_fwspec_mapping) from [<c035b1e0>] | [<c035b1e0>] (irq_create_of_mapping) from [<c0614eec>] | [<c0614eec>] (of_irq_get) from [<c0614f3c>] | [<c0614f3c>] (of_irq_to_resource) from [<c0614ff0>] | [<c0614ff0>] (of_irq_to_resource_table) from [<c0610e08>] | [<c0610e08>] (of_device_alloc) from [<c0610ea0>] | [<c0610ea0>] (of_platform_device_create_pdata) | [<c061120c>] (of_platform_bus_create) | [<c06113c4>] (of_platform_populate) | [<bf4c06b4>] (dwc3_qcom_probe [dwc3_qcom]) Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
		
			
				
	
	
		
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			124 lines
		
	
	
		
			3.0 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
From 1fc7d5523e21ed140fed43c4dde011a3b6d9ba08 Mon Sep 17 00:00:00 2001
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From: John Crispin <john@phrozen.org>
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Date: Tue, 24 Jul 2018 14:47:55 +0200
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Subject: [PATCH 3/3] qcom: ipq4019: add USB devicetree nodes
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This patch makes USB work on the Dakota EVB.
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Signed-off-by: John Crispin <john@phrozen.org>
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---
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 arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 ++++++++
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 arch/arm/boot/dts/qcom-ipq4019.dtsi           | 74 +++++++++++++++++++++++++++
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 2 files changed, 94 insertions(+)
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--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
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@@ -101,5 +101,25 @@
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 		wifi@a800000 {
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 			status = "ok";
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 		};
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+
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+		usb3_ss_phy: ssphy@9a000 {
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+			status = "ok";
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+		};
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+
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+		usb3_hs_phy: hsphy@a6000 {
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+			status = "ok";
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+		};
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+
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+		usb3: usb3@8af8800 {
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+			status = "ok";
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+		};
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+
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+		usb2_hs_phy: hsphy@a8000 {
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+			status = "ok";
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+		};
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+
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+		usb2: usb2@60f8800 {
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+			status = "ok";
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+		};
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 	};
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 };
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -410,5 +410,79 @@
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 					  "legacy";
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 			status = "disabled";
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 		};
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+
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+		usb3_ss_phy: ssphy@9a000 {
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+			compatible = "qcom,usb-ss-ipq4019-phy";
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+			#phy-cells = <0>;
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+			reg = <0x9a000 0x800>;
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+			reg-names = "phy_base";
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+			resets = <&gcc USB3_UNIPHY_PHY_ARES>;
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+			reset-names = "por_rst";
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+			status = "disabled";
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+		};
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+
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+		usb3_hs_phy: hsphy@a6000 {
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+			compatible = "qcom,usb-hs-ipq4019-phy";
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+			#phy-cells = <0>;
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+			reg = <0xa6000 0x40>;
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+			reg-names = "phy_base";
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+			resets = <&gcc USB3_HSPHY_POR_ARES>, <&gcc USB3_HSPHY_S_ARES>;
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+			reset-names = "por_rst", "srif_rst";
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+			status = "disabled";
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+		};
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+
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+		usb3@8af8800 {
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+			compatible = "qcom,dwc3";
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+			reg = <0x8af8800 0x100>;
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+			#address-cells = <1>;
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+			#size-cells = <1>;
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+			clocks = <&gcc GCC_USB3_MASTER_CLK>,
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+				 <&gcc GCC_USB3_SLEEP_CLK>,
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+				 <&gcc GCC_USB3_MOCK_UTMI_CLK>;
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+			clock-names = "master", "sleep", "mock_utmi";
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+			ranges;
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+			status = "disabled";
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+
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+			dwc3@8a00000 {
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+				compatible = "snps,dwc3";
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+				reg = <0x8a00000 0xf8000>;
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+				interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
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+				phys = <&usb3_hs_phy>, <&usb3_ss_phy>;
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+				phy-names = "usb2-phy", "usb3-phy";
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+				dr_mode = "host";
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+			};
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+		};
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+
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+		usb2_hs_phy: hsphy@a8000 {
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+			compatible = "qcom,usb-hs-ipq4019-phy";
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+			#phy-cells = <0>;
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+			reg = <0xa8000 0x40>;
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+			reg-names = "phy_base";
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+			resets = <&gcc USB2_HSPHY_POR_ARES>, <&gcc USB2_HSPHY_S_ARES>;
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+			reset-names = "por_rst", "srif_rst";
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+			status = "disabled";
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+		};
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+
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+		usb2@60f8800 {
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+			compatible = "qcom,dwc3";
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+			reg = <0x60f8800 0x100>;
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+			#address-cells = <1>;
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+			#size-cells = <1>;
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+			clocks = <&gcc GCC_USB2_MASTER_CLK>,
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+				 <&gcc GCC_USB2_SLEEP_CLK>,
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+				 <&gcc GCC_USB2_MOCK_UTMI_CLK>;
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+			clock-names = "master", "sleep", "mock_utmi";
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+			ranges;
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+			status = "disabled";
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+
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+			dwc3@6000000 {
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+				compatible = "snps,dwc3";
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+				reg = <0x6000000 0xf8000>;
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+				interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
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+				phys = <&usb2_hs_phy>;
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+				phy-names = "usb2-phy";
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+				dr_mode = "host";
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+			};
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+		};
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 	};
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 };
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