1e4469b090
Backport qca8k new feature: - Ageing configuration support - Add 2 missing counter on qca8337 - Convert to regmap - Standardize define and code with GENMASK AND BITFILED macro - Add mdb add/del support Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
121 lines
3.5 KiB
Diff
121 lines
3.5 KiB
Diff
From c126f118b330ccf0db0dda4a4bd6c729865a205f Mon Sep 17 00:00:00 2001
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From: Ansuel Smith <ansuelsmth@gmail.com>
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Date: Mon, 22 Nov 2021 16:23:45 +0100
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Subject: net: dsa: qca8k: add additional MIB counter and make it dynamic
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We are currently missing 2 additionals MIB counter present in QCA833x
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switch.
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QC832x switch have 39 MIB counter and QCA833X have 41 MIB counter.
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Add the additional MIB counter and rework the MIB function to print the
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correct supported counter from the match_data struct.
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Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
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Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/dsa/qca8k.c | 23 ++++++++++++++++++++---
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drivers/net/dsa/qca8k.h | 4 ++++
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2 files changed, 24 insertions(+), 3 deletions(-)
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--- a/drivers/net/dsa/qca8k.c
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+++ b/drivers/net/dsa/qca8k.c
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@@ -70,6 +70,8 @@ static const struct qca8k_mib_desc ar832
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MIB_DESC(1, 0x9c, "TxExcDefer"),
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MIB_DESC(1, 0xa0, "TxDefer"),
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MIB_DESC(1, 0xa4, "TxLateCol"),
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+ MIB_DESC(1, 0xa8, "RXUnicast"),
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+ MIB_DESC(1, 0xac, "TXUnicast"),
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};
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/* The 32bit switch registers are accessed indirectly. To achieve this we need
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@@ -1605,12 +1607,16 @@ qca8k_phylink_mac_link_up(struct dsa_swi
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static void
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qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data)
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{
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+ const struct qca8k_match_data *match_data;
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+ struct qca8k_priv *priv = ds->priv;
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int i;
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if (stringset != ETH_SS_STATS)
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return;
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- for (i = 0; i < ARRAY_SIZE(ar8327_mib); i++)
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+ match_data = of_device_get_match_data(priv->dev);
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+
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+ for (i = 0; i < match_data->mib_count; i++)
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strncpy(data + i * ETH_GSTRING_LEN, ar8327_mib[i].name,
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ETH_GSTRING_LEN);
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}
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@@ -1620,12 +1626,15 @@ qca8k_get_ethtool_stats(struct dsa_switc
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uint64_t *data)
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{
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struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
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+ const struct qca8k_match_data *match_data;
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const struct qca8k_mib_desc *mib;
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u32 reg, i, val;
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u32 hi = 0;
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int ret;
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- for (i = 0; i < ARRAY_SIZE(ar8327_mib); i++) {
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+ match_data = of_device_get_match_data(priv->dev);
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+
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+ for (i = 0; i < match_data->mib_count; i++) {
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mib = &ar8327_mib[i];
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reg = QCA8K_PORT_MIB_COUNTER(port) + mib->offset;
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@@ -1648,10 +1657,15 @@ qca8k_get_ethtool_stats(struct dsa_switc
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static int
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qca8k_get_sset_count(struct dsa_switch *ds, int port, int sset)
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{
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+ const struct qca8k_match_data *match_data;
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+ struct qca8k_priv *priv = ds->priv;
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+
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if (sset != ETH_SS_STATS)
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return 0;
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- return ARRAY_SIZE(ar8327_mib);
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+ match_data = of_device_get_match_data(priv->dev);
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+
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+ return match_data->mib_count;
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}
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static int
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@@ -2146,14 +2160,17 @@ static SIMPLE_DEV_PM_OPS(qca8k_pm_ops,
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static const struct qca8k_match_data qca8327 = {
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.id = QCA8K_ID_QCA8327,
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.reduced_package = true,
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+ .mib_count = QCA8K_QCA832X_MIB_COUNT,
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};
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static const struct qca8k_match_data qca8328 = {
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.id = QCA8K_ID_QCA8327,
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+ .mib_count = QCA8K_QCA832X_MIB_COUNT,
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};
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static const struct qca8k_match_data qca833x = {
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.id = QCA8K_ID_QCA8337,
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+ .mib_count = QCA8K_QCA833X_MIB_COUNT,
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};
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static const struct of_device_id qca8k_of_match[] = {
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--- a/drivers/net/dsa/qca8k.h
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+++ b/drivers/net/dsa/qca8k.h
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@@ -21,6 +21,9 @@
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#define PHY_ID_QCA8337 0x004dd036
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#define QCA8K_ID_QCA8337 0x13
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+#define QCA8K_QCA832X_MIB_COUNT 39
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+#define QCA8K_QCA833X_MIB_COUNT 41
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+
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#define QCA8K_BUSY_WAIT_TIMEOUT 2000
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#define QCA8K_NUM_FDB_RECORDS 2048
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@@ -279,6 +282,7 @@ struct ar8xxx_port_status {
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struct qca8k_match_data {
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u8 id;
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bool reduced_package;
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+ u8 mib_count;
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};
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enum {
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