b92ec82235
Removed upstreamed: generic/backport-5.10/350-v5.18-MIPS-pgalloc-fix-memory-leak-caused-by-pgd_free.patch generic/pending-5.10/850-0014-PCI-aardvark-Fix-reading-PCI_EXP_RTSTA_PME-bit-on-em.patch ipq40xx/patches-5.10/105-ipq40xx-fix-sleep-clock.patch All patches automatically rebased. Build system: x86_64 Build-tested: bcm2711/RPi4B, mt7622/RT3200 Run-tested: bcm2711/RPi4B, mt7622/RT3200 Compile-/run-tested: ath79/generic (Archer C7 v2). Signed-off-by: John Audia <graysky@archlinux.us>
39 lines
1.5 KiB
Diff
39 lines
1.5 KiB
Diff
From 735a4ac9782b96fbe1543c578aa8334364f21abd Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
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Date: Fri, 2 Apr 2021 14:05:24 +0200
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Subject: [PATCH] PCI: aardvark: Enable MSI-X support
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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According to PCI 3.0 specification, sending both MSI and MSI-X interrupts
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is done by DWORD memory write operation to doorbell message address. The
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write operation for MSI has zero upper 16 bits and the MSI interrupt number
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in the lower 16 bits, while the write operation for MSI-X contains a 32-bit
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value from MSI-X table.
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Since the driver only uses interrupt numbers from range 0..31, the upper
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16 bits of the DWORD memory write operation to doorbell message address
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are zero even for MSI-X interrupts. Thus we can enable MSI-X interrupts.
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Testing proves that kernel can correctly receive MSI-X interrupts from PCIe
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cards which supports both MSI and MSI-X interrupts.
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Signed-off-by: Pali Rohár <pali@kernel.org>
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Signed-off-by: Marek Behún <kabel@kernel.org>
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---
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drivers/pci/controller/pci-aardvark.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/pci/controller/pci-aardvark.c
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+++ b/drivers/pci/controller/pci-aardvark.c
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@@ -1346,7 +1346,7 @@ static struct irq_chip advk_msi_irq_chip
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static struct msi_domain_info advk_msi_domain_info = {
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.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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- MSI_FLAG_MULTI_PCI_MSI,
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+ MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX,
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.chip = &advk_msi_irq_chip,
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};
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