 f4e5880d0f
			
		
	
	f4e5880d0f
	
	
	
		
			
			- removed upstreamed patches - 0901-spansion_nand_id_fix.patch is disabled, not clear if it's needed Signed-off-by: Roman Yeryomin <roman@advem.lv> Signed-off-by: John Crispin <john@phrozen.org>
		
			
				
	
	
		
			99 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			99 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| --- a/arch/mips/ralink/mt7621.c
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| +++ b/arch/mips/ralink/mt7621.c
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| @@ -16,6 +16,7 @@
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|  #include <asm/mach-ralink/ralink_regs.h>
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|  #include <asm/mach-ralink/mt7621.h>
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|  #include <asm/mips-boards/launch.h>
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| +#include <asm/delay.h>
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|  
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|  #include <pinmux.h>
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|  
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| @@ -177,6 +178,58 @@ bool plat_cpu_core_present(int core)
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|  	return true;
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|  }
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|  
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| +#define LPS_PREC 8
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| +/*
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| +*  Re-calibration lpj(loop-per-jiffy).
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| +*  (derived from kernel/calibrate.c)
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| +*/
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| +static int udelay_recal(void)
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| +{
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| +	unsigned int i, lpj = 0;
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| +	unsigned long ticks, loopbit;
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| +	int lps_precision = LPS_PREC;
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| +
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| +	lpj = (1<<12);
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| +
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| +	while ((lpj <<= 1) != 0) {
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| +		/* wait for "start of" clock tick */
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| +		ticks = jiffies;
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| +		while (ticks == jiffies)
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| +			/* nothing */;
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| +
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| +		/* Go .. */
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| +		ticks = jiffies;
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| +		__delay(lpj);
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| +		ticks = jiffies - ticks;
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| +		if (ticks)
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| +			break;
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| +	}
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| +
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| +	/*
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| +	 * Do a binary approximation to get lpj set to
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| +	 * equal one clock (up to lps_precision bits)
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| +	 */
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| +	lpj >>= 1;
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| +	loopbit = lpj;
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| +	while (lps_precision-- && (loopbit >>= 1)) {
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| +		lpj |= loopbit;
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| +		ticks = jiffies;
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| +		while (ticks == jiffies)
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| +			/* nothing */;
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| +		ticks = jiffies;
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| +		__delay(lpj);
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| +		if (jiffies != ticks)   /* longer than 1 tick */
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| +			lpj &= ~loopbit;
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| +	}
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| +	printk(KERN_INFO "%d CPUs re-calibrate udelay(lpj = %d)\n", NR_CPUS, lpj);
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| +
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| +	for(i=0; i< NR_CPUS; i++)
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| +		cpu_data[i].udelay_val = lpj;
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| +
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| +	return 0;
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| +}
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| +device_initcall(udelay_recal);
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| +
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|  void prom_soc_init(struct ralink_soc_info *soc_info)
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|  {
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|  	void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE);
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| --- a/arch/mips/ralink/Kconfig
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| +++ b/arch/mips/ralink/Kconfig
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| @@ -58,6 +58,7 @@ choice
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|  		select CLKSRC_MIPS_GIC
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|  		select HW_HAS_PCI
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|  		select WEAK_REORDERING_BEYOND_LLSC
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| +		select GENERIC_CLOCKEVENTS_BROADCAST
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|  endchoice
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|  
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|  choice
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| --- a/arch/mips/ralink/timer-gic.c
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| +++ b/arch/mips/ralink/timer-gic.c
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| @@ -12,6 +12,7 @@
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|  #include <linux/of.h>
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|  #include <linux/clk-provider.h>
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|  #include <linux/clocksource.h>
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| +#include <asm/time.h>
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|  
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|  #include "common.h"
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|  
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| @@ -19,6 +20,8 @@ void __init plat_time_init(void)
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|  {
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|  	ralink_of_remap();
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|  
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| +	mips_hpt_frequency = 880000000 / 2;
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| +
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|  	of_clk_init(NULL);
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|  	timer_probe();
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|  }
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