This patch has been backported to stable kernel 5.4 already. Remove our local patch explicitly now, as by applying the patch (or refreshing) the relevant code is actually added a second time. Refresh remaining patches as well. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
		
			
				
	
	
		
			129 lines
		
	
	
		
			5.0 KiB
		
	
	
	
		
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			129 lines
		
	
	
		
			5.0 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
From: Russell King <rmk+kernel@armlinux.org.uk>
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Bcc: linux@mail.armlinux.org.uk
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Cc: linux-i2c@vger.kernel.org
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Subject: [PATCH 08/17] i2c: pxa: move private definitions to i2c-pxa.c
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MIME-Version: 1.0
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Content-Type: text/plain; charset="utf-8"
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Move driver-private definitions out of the i2c-pxa.h platform data
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header file into the driver itself. Nothing outside of the driver
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makes use of these constants.
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Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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---
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 drivers/i2c/busses/i2c-pxa.c          | 43 ++++++++++++++++++++++++
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 include/linux/platform_data/i2c-pxa.h | 48 ---------------------------
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 2 files changed, 43 insertions(+), 48 deletions(-)
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--- a/drivers/i2c/busses/i2c-pxa.c
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+++ b/drivers/i2c/busses/i2c-pxa.c
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@@ -86,6 +86,49 @@
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 #define IWCR_HS_CNT2_SHIFT	10
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 #define IWCR_HS_CNT2_MASK	(0x1F << IWCR_HS_CNT2_SHIFT)
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+/* need a longer timeout if we're dealing with the fact we may well be
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+ * looking at a multi-master environment
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+ */
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+#define DEF_TIMEOUT             32
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+
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+#define BUS_ERROR               (-EREMOTEIO)
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+#define XFER_NAKED              (-ECONNREFUSED)
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+#define I2C_RETRY               (-2000) /* an error has occurred retry transmit */
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+
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+/* ICR initialize bit values
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+ *
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+ * 15 FM     0 (100 kHz operation)
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+ * 14 UR     0 (No unit reset)
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+ * 13 SADIE  0 (Disables the unit from interrupting on slave addresses
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+ *              matching its slave address)
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+ * 12 ALDIE  0 (Disables the unit from interrupt when it loses arbitration
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+ *              in master mode)
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+ * 11 SSDIE  0 (Disables interrupts from a slave stop detected, in slave mode)
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+ * 10 BEIE   1 (Enable interrupts from detected bus errors, no ACK sent)
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+ *  9 IRFIE  1 (Enable interrupts from full buffer received)
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+ *  8 ITEIE  1 (Enables the I2C unit to interrupt when transmit buffer empty)
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+ *  7 GCD    1 (Disables i2c unit response to general call messages as a slave)
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+ *  6 IUE    0 (Disable unit until we change settings)
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+ *  5 SCLE   1 (Enables the i2c clock output for master mode (drives SCL)
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+ *  4 MA     0 (Only send stop with the ICR stop bit)
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+ *  3 TB     0 (We are not transmitting a byte initially)
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+ *  2 ACKNAK 0 (Send an ACK after the unit receives a byte)
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+ *  1 STOP   0 (Do not send a STOP)
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+ *  0 START  0 (Do not send a START)
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+ */
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+#define I2C_ICR_INIT	(ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
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+
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+/* I2C status register init values
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+ *
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+ * 10 BED    1 (Clear bus error detected)
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+ *  9 SAD    1 (Clear slave address detected)
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+ *  7 IRF    1 (Clear IDBR Receive Full)
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+ *  6 ITE    1 (Clear IDBR Transmit Empty)
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+ *  5 ALD    1 (Clear Arbitration Loss Detected)
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+ *  4 SSD    1 (Clear Slave Stop Detected)
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+ */
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+#define I2C_ISR_INIT	0x7FF  /* status register init */
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+
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 struct pxa_reg_layout {
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 	u32 ibmr;
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 	u32 idbr;
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--- a/include/linux/platform_data/i2c-pxa.h
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+++ b/include/linux/platform_data/i2c-pxa.h
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@@ -7,54 +7,6 @@
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 #ifndef _I2C_PXA_H_
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 #define _I2C_PXA_H_
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-#if 0
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-#define DEF_TIMEOUT             3
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-#else
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-/* need a longer timeout if we're dealing with the fact we may well be
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- * looking at a multi-master environment
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-*/
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-#define DEF_TIMEOUT             32
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-#endif
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-
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-#define BUS_ERROR               (-EREMOTEIO)
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-#define XFER_NAKED              (-ECONNREFUSED)
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-#define I2C_RETRY               (-2000) /* an error has occurred retry transmit */
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-
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-/* ICR initialize bit values
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-*
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-*  15. FM       0 (100 Khz operation)
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-*  14. UR       0 (No unit reset)
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-*  13. SADIE    0 (Disables the unit from interrupting on slave addresses
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-*                                       matching its slave address)
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-*  12. ALDIE    0 (Disables the unit from interrupt when it loses arbitration
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-*                                       in master mode)
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-*  11. SSDIE    0 (Disables interrupts from a slave stop detected, in slave mode)
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-*  10. BEIE     1 (Enable interrupts from detected bus errors, no ACK sent)
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-*  9.  IRFIE    1 (Enable interrupts from full buffer received)
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-*  8.  ITEIE    1 (Enables the I2C unit to interrupt when transmit buffer empty)
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-*  7.  GCD      1 (Disables i2c unit response to general call messages as a slave)
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-*  6.  IUE      0 (Disable unit until we change settings)
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-*  5.  SCLE     1 (Enables the i2c clock output for master mode (drives SCL)
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-*  4.  MA       0 (Only send stop with the ICR stop bit)
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-*  3.  TB       0 (We are not transmitting a byte initially)
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-*  2.  ACKNAK   0 (Send an ACK after the unit receives a byte)
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-*  1.  STOP     0 (Do not send a STOP)
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-*  0.  START    0 (Do not send a START)
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-*
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-*/
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-#define I2C_ICR_INIT	(ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
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-
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-/* I2C status register init values
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- *
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- * 10. BED      1 (Clear bus error detected)
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- * 9.  SAD      1 (Clear slave address detected)
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- * 7.  IRF      1 (Clear IDBR Receive Full)
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- * 6.  ITE      1 (Clear IDBR Transmit Empty)
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- * 5.  ALD      1 (Clear Arbitration Loss Detected)
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- * 4.  SSD      1 (Clear Slave Stop Detected)
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- */
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-#define I2C_ISR_INIT	0x7FF  /* status register init */
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-
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 struct i2c_slave_client;
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 struct i2c_pxa_platform_data {
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