b4c02c9998
Removed upstreamed patches:
generic/pending-5.4
445-mtd-spinand-gigadevice-Only-one-dummy-byte-in-QUA.patch
446-mtd-spinand-gigadevice-Add-QE-Bit.patch
pistachio/patches-5.4
150-pwm-img-Fix-null-pointer-access-in-probe.patch
Manually rebased:
layerscape/patches-5.4
801-audio-0011-Revert-ASoC-fsl_sai-add-of_match-data.patch
801-audio-0039-MLK-16224-6-ASoC-fsl_sai-fix-DSD-suspend-resume.patch
801-audio-0073-MLK-21957-3-ASoC-fsl_sai-add-bitcount-and-timestamp-.patch
820-usb-0009-usb-dwc3-Add-workaround-for-host-mode-VBUS-glitch-wh.patch
All modifications made by update_kernel.sh
Build system: x86_64
Build-tested: ipq806x/R7800, ath79/generic, bcm27xx/bcm2711,
mvebu (mamba, rango), x86_64, ramips/mt7621
Run-tested: ipq806x/R7800, mvebu (mamba, rango), x86_64, ramips (RT-AC57U)
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
[alter 820-usb-0009-usb-dwc3-Add-workaround-for-host-mode-VBUS-glitch-wh]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
240 lines
7.3 KiB
Diff
240 lines
7.3 KiB
Diff
From dc17fd4b8c27ca47fb5d9113df715579bc4a04a3 Mon Sep 17 00:00:00 2001
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From: Po Liu <po.liu@nxp.com>
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Date: Fri, 30 Sep 2016 17:11:37 +0800
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Subject: [PATCH] pci:add support aer/pme interrupts with none MSI/MSI-X/INTx
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mode
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On some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
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When chip support the aer/pme interrupts with none MSI/MSI-X/INTx mode,
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maybe there is interrupt line for aer pme etc. Search the interrupt
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number in the fdt file. Then fixup the dev->irq with it.
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Signed-off-by: Po Liu <po.liu@nxp.com>
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Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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---
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.../devicetree/bindings/pci/layerscape-pci.txt | 13 +++++--
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arch/arm/kernel/bios32.c | 44 ++++++++++++++++++++++
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arch/arm64/kernel/pci.c | 44 ++++++++++++++++++++++
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drivers/pci/pcie/portdrv_core.c | 29 ++++++++++++++
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include/linux/pci.h | 1 +
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5 files changed, 127 insertions(+), 4 deletions(-)
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--- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
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+++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
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@@ -26,8 +26,12 @@ Required properties:
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- reg: base addresses and lengths of the PCIe controller register blocks.
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- interrupts: A list of interrupt outputs of the controller. Must contain an
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entry for each entry in the interrupt-names property.
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-- interrupt-names: Must include the following entries:
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- "intr": The interrupt that is asserted for controller interrupts
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+- interrupt-names: It could include the following entries:
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+ "aer": Asserted for aer interrupt when chip support the aer interrupt with
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+ none MSI/MSI-X/INTx mode,but there is interrupt line for aer.
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+ "pme": Asserted for pme interrupt when chip support the pme interrupt with
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+ none MSI/MSI-X/INTx mode,but there is interrupt line for pme.
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+ ......
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- fsl,pcie-scfg: Must include two entries.
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The first entry must be a link to the SCFG device node
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The second entry must be '0' or '1' based on physical PCIe controller index.
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@@ -43,8 +47,9 @@ Example:
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reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */
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0x40 0x00000000 0x0 0x00002000>; /* configuration space */
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reg-names = "regs", "config";
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- interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
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- interrupt-names = "intr";
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+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>, /* aer interrupt */
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+ <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* pme interrupt */
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+ interrupt-names = "aer", "pme";
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fsl,pcie-scfg = <&scfg 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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--- a/arch/arm/kernel/bios32.c
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+++ b/arch/arm/kernel/bios32.c
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@@ -12,11 +12,14 @@
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/io.h>
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+#include <linux/of_irq.h>
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#include <asm/mach-types.h>
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#include <asm/mach/map.h>
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#include <asm/mach/pci.h>
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+#include "../../../drivers/pci/pcie/portdrv.h"
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+
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static int debug_pci;
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/*
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@@ -65,6 +68,47 @@ void pcibios_report_status(u_int status_
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}
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/*
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+ * Check device tree if the service interrupts are there
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+ */
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+int pcibios_check_service_irqs(struct pci_dev *dev, int *irqs, int mask)
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+{
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+ int ret, count = 0;
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+ struct device_node *np = NULL;
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+
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+ if (dev->bus->dev.of_node)
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+ np = dev->bus->dev.of_node;
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+
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+ if (np == NULL)
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+ return 0;
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+
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+ if (!IS_ENABLED(CONFIG_OF_IRQ))
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+ return 0;
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+
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+ /* If root port doesn't support MSI/MSI-X/INTx in RC mode,
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+ * request irq for aer
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+ */
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+ if (mask & PCIE_PORT_SERVICE_AER) {
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+ ret = of_irq_get_byname(np, "aer");
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+ if (ret > 0) {
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+ irqs[PCIE_PORT_SERVICE_AER_SHIFT] = ret;
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+ count++;
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+ }
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+ }
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+
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+ if (mask & PCIE_PORT_SERVICE_PME) {
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+ ret = of_irq_get_byname(np, "pme");
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+ if (ret > 0) {
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+ irqs[PCIE_PORT_SERVICE_PME_SHIFT] = ret;
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+ count++;
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+ }
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+ }
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+
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+ /* TODO: add more service interrupts if there it is in the device tree*/
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+
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+ return count;
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+}
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+
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+/*
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* We don't use this to fix the device, but initialisation of it.
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* It's not the correct use for this, but it works.
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* Note that the arbiter/ISA bridge appears to be buggy, specifically in
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--- a/arch/arm64/kernel/pci.c
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+++ b/arch/arm64/kernel/pci.c
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@@ -13,11 +13,14 @@
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#include <linux/mm.h>
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#include <linux/of_pci.h>
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#include <linux/of_platform.h>
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+#include <linux/of_irq.h>
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#include <linux/pci.h>
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#include <linux/pci-acpi.h>
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#include <linux/pci-ecam.h>
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#include <linux/slab.h>
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+#include "../../../drivers/pci/pcie/portdrv.h"
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+
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#ifdef CONFIG_ACPI
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/*
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* Try to assign the IRQ number when probing a new device
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@@ -32,6 +35,47 @@ int pcibios_alloc_irq(struct pci_dev *de
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#endif
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/*
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+ * Check device tree if the service interrupts are there
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+ */
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+int pcibios_check_service_irqs(struct pci_dev *dev, int *irqs, int mask)
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+{
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+ int ret, count = 0;
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+ struct device_node *np = NULL;
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+
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+ if (dev->bus->dev.of_node)
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+ np = dev->bus->dev.of_node;
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+
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+ if (np == NULL)
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+ return 0;
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+
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+ if (!IS_ENABLED(CONFIG_OF_IRQ))
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+ return 0;
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+
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+ /* If root port doesn't support MSI/MSI-X/INTx in RC mode,
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+ * request irq for aer
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+ */
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+ if (mask & PCIE_PORT_SERVICE_AER) {
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+ ret = of_irq_get_byname(np, "aer");
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+ if (ret > 0) {
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+ irqs[PCIE_PORT_SERVICE_AER_SHIFT] = ret;
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+ count++;
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+ }
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+ }
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+
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+ if (mask & PCIE_PORT_SERVICE_PME) {
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+ ret = of_irq_get_byname(np, "pme");
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+ if (ret > 0) {
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+ irqs[PCIE_PORT_SERVICE_PME_SHIFT] = ret;
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+ count++;
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+ }
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+ }
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+
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+ /* TODO: add more service interrupts if there it is in the device tree*/
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+
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+ return count;
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+}
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+
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+/*
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* raw_pci_read/write - Platform-specific PCI config space access.
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*/
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int raw_pci_read(unsigned int domain, unsigned int bus,
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--- a/drivers/pci/pcie/portdrv_core.c
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+++ b/drivers/pci/pcie/portdrv_core.c
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@@ -37,6 +37,20 @@ static void release_pcie_device(struct d
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kfree(to_pcie_device(dev));
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}
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+/**
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+ * pcibios_check_service_irqs - check irqs in the device tree
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+ * @dev: PCI Express port to handle
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+ * @irqs: Array of irqs to populate
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+ * @mask: Bitmask of port capabilities returned by get_port_device_capability()
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+ *
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+ * Return value: 0 means no service irqs in the device tree
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+ *
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+ */
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+int __weak pcibios_check_service_irqs(struct pci_dev *dev, int *irqs, int mask)
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+{
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+ return 0;
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+}
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+
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/*
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* Fill in *pme, *aer, *dpc with the relevant Interrupt Message Numbers if
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* services are enabled in "mask". Return the number of MSI/MSI-X vectors
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@@ -165,10 +179,25 @@ static int pcie_port_enable_irq_vec(stru
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static int pcie_init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
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{
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int ret, i;
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+ int irq = -1;
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for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
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irqs[i] = -1;
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+ /* Check if some platforms owns independent irq pins for AER/PME etc.
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+ * Some platforms may own independent AER/PME interrupts and set
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+ * them in the device tree file.
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+ */
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+ ret = pcibios_check_service_irqs(dev, irqs, mask);
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+ if (ret) {
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+ if (dev->irq)
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+ irq = dev->irq;
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+ for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
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+ if (irqs[i] == -1)
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+ irqs[i] = irq;
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+ return 0;
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+ }
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+
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/*
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* If we support PME but can't use MSI/MSI-X for it, we have to
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* fall back to INTx or other interrupts, e.g., a system shared
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--- a/include/linux/pci.h
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+++ b/include/linux/pci.h
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@@ -2021,6 +2021,7 @@ static inline void pcibios_penalize_isa_
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int pcibios_alloc_irq(struct pci_dev *dev);
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void pcibios_free_irq(struct pci_dev *dev);
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resource_size_t pcibios_default_alignment(void);
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+int pcibios_check_service_irqs(struct pci_dev *dev, int *irqs, int mask);
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#ifdef CONFIG_HIBERNATE_CALLBACKS
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extern struct dev_pm_ops pcibios_pm_ops;
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