d6b785d477
This adds Kernel 5.10 support for the generic, nand and tiny subtargets. The following patch is not contained, as it needs to be reworked: platform/920-mikrotik-rb4xx.patch Tested-on: - Siemens WS-AP3610 - Enterasys WS-AP3710 - Aerohive HiveAP 121 - TP-Link TL-WA901 v2 - TP-Link TL-WR741 v1 Signed-off-by: David Bauer <mail@david-bauer.net>
58 lines
1.9 KiB
Diff
58 lines
1.9 KiB
Diff
From 4a4f869ec58ed8910b9b2e68d0eee50957e9bb20 Mon Sep 17 00:00:00 2001
|
|
From: John Crispin <john@phrozen.org>
|
|
Date: Mon, 25 Jun 2018 15:52:10 +0200
|
|
Subject: [PATCH 17/33] dt-bindings: PCI: qcom,ar7100: adds binding doc
|
|
|
|
With the driver being converted from platform_data to pure OF, we need to
|
|
also add some docs.
|
|
|
|
Cc: Rob Herring <robh+dt@kernel.org>
|
|
Cc: devicetree@vger.kernel.org
|
|
Signed-off-by: John Crispin <john@phrozen.org>
|
|
---
|
|
.../devicetree/bindings/pci/qcom,ar7100-pci.txt | 38 ++++++++++++++++++++++
|
|
1 file changed, 38 insertions(+)
|
|
create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt
|
|
|
|
--- /dev/null
|
|
+++ b/Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt
|
|
@@ -0,0 +1,38 @@
|
|
+* Qualcomm Atheros AR7100 PCI express root complex
|
|
+
|
|
+Required properties:
|
|
+- compatible: should contain "qcom,ar7100-pci" to identify the core.
|
|
+- reg: Should contain the register ranges as listed in the reg-names property.
|
|
+- reg-names: Definition: Must include the following entries
|
|
+ - "cfg_base" IO Memory
|
|
+- #address-cells: set to <3>
|
|
+- #size-cells: set to <2>
|
|
+- ranges: ranges for the PCI memory and I/O regions
|
|
+- interrupt-map-mask and interrupt-map: standard PCI
|
|
+ properties to define the mapping of the PCIe interface to interrupt
|
|
+ numbers.
|
|
+- #interrupt-cells: set to <1>
|
|
+- interrupt-controller: define to enable the builtin IRQ cascade.
|
|
+
|
|
+Optional properties:
|
|
+- interrupt-parent: phandle to the MIPS IRQ controller
|
|
+
|
|
+* Example for ar7100
|
|
+ pcie-controller@180c0000 {
|
|
+ compatible = "qca,ar7100-pci";
|
|
+ #address-cells = <3>;
|
|
+ #size-cells = <2>;
|
|
+ bus-range = <0x0 0x0>;
|
|
+ reg = <0x17010000 0x100>;
|
|
+ reg-names = "cfg_base";
|
|
+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000
|
|
+ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>;
|
|
+ interrupt-parent = <&cpuintc>;
|
|
+ interrupts = <2>;
|
|
+
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <1>;
|
|
+
|
|
+ interrupt-map-mask = <0 0 0 1>;
|
|
+ interrupt-map = <0 0 0 0 &pcie0 0>;
|
|
+ };
|