f4d949b404
Backport qca8k fixup for mgmt and mdio read/write for kernel 5.15 fixup port dropping and configuration issue. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Robert Marko <robimarko@gmail.com>
173 lines
4.7 KiB
Diff
173 lines
4.7 KiB
Diff
From 03cb9e6d0b32b768e3d9d473c5c4ca1100877664 Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Thu, 29 Dec 2022 17:33:34 +0100
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Subject: [PATCH 3/5] Revert "net: dsa: qca8k: cache lo and hi for mdio write"
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This reverts commit 2481d206fae7884cd07014fd1318e63af35e99eb.
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The Documentation is very confusing about the topic.
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The cache logic for hi and lo is wrong and actually miss some regs to be
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actually written.
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What the Documentation actually intended was that it's possible to skip
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writing hi OR lo if half of the reg is not needed to be written or read.
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Revert the change in favor of a better and correct implementation.
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Reported-by: Ronald Wahl <ronald.wahl@raritan.com>
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Cc: stable@vger.kernel.org # v5.18+
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/dsa/qca/qca8k-8xxx.c | 61 +++++++-------------------------
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drivers/net/dsa/qca/qca8k.h | 5 ---
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2 files changed, 12 insertions(+), 54 deletions(-)
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--- a/drivers/net/dsa/qca/qca8k-8xxx.c
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+++ b/drivers/net/dsa/qca/qca8k-8xxx.c
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@@ -37,44 +37,6 @@ qca8k_split_addr(u32 regaddr, u16 *r1, u
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}
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static int
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-qca8k_set_lo(struct qca8k_priv *priv, int phy_id, u32 regnum, u16 lo)
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-{
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- u16 *cached_lo = &priv->mdio_cache.lo;
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- struct mii_bus *bus = priv->bus;
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- int ret;
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-
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- if (lo == *cached_lo)
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- return 0;
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-
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- ret = bus->write(bus, phy_id, regnum, lo);
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- if (ret < 0)
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- dev_err_ratelimited(&bus->dev,
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- "failed to write qca8k 32bit lo register\n");
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-
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- *cached_lo = lo;
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- return 0;
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-}
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-
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-static int
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-qca8k_set_hi(struct qca8k_priv *priv, int phy_id, u32 regnum, u16 hi)
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-{
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- u16 *cached_hi = &priv->mdio_cache.hi;
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- struct mii_bus *bus = priv->bus;
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- int ret;
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-
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- if (hi == *cached_hi)
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- return 0;
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-
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- ret = bus->write(bus, phy_id, regnum, hi);
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- if (ret < 0)
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- dev_err_ratelimited(&bus->dev,
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- "failed to write qca8k 32bit hi register\n");
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-
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- *cached_hi = hi;
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- return 0;
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-}
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-
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-static int
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qca8k_mii_read32(struct mii_bus *bus, int phy_id, u32 regnum, u32 *val)
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{
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int ret;
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@@ -97,7 +59,7 @@ qca8k_mii_read32(struct mii_bus *bus, in
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}
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static void
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-qca8k_mii_write32(struct qca8k_priv *priv, int phy_id, u32 regnum, u32 val)
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+qca8k_mii_write32(struct mii_bus *bus, int phy_id, u32 regnum, u32 val)
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{
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u16 lo, hi;
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int ret;
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@@ -105,9 +67,12 @@ qca8k_mii_write32(struct qca8k_priv *pri
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lo = val & 0xffff;
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hi = (u16)(val >> 16);
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- ret = qca8k_set_lo(priv, phy_id, regnum, lo);
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+ ret = bus->write(bus, phy_id, regnum, lo);
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if (ret >= 0)
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- ret = qca8k_set_hi(priv, phy_id, regnum + 1, hi);
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+ ret = bus->write(bus, phy_id, regnum + 1, hi);
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+ if (ret < 0)
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+ dev_err_ratelimited(&bus->dev,
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+ "failed to write qca8k 32bit register\n");
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}
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static int
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@@ -442,7 +407,7 @@ qca8k_regmap_write(void *ctx, uint32_t r
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if (ret < 0)
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goto exit;
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- qca8k_mii_write32(priv, 0x10 | r2, r1, val);
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+ qca8k_mii_write32(bus, 0x10 | r2, r1, val);
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exit:
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mutex_unlock(&bus->mdio_lock);
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@@ -475,7 +440,7 @@ qca8k_regmap_update_bits(void *ctx, uint
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val &= ~mask;
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val |= write_val;
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- qca8k_mii_write32(priv, 0x10 | r2, r1, val);
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+ qca8k_mii_write32(bus, 0x10 | r2, r1, val);
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exit:
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mutex_unlock(&bus->mdio_lock);
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@@ -750,14 +715,14 @@ qca8k_mdio_write(struct qca8k_priv *priv
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if (ret)
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goto exit;
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- qca8k_mii_write32(priv, 0x10 | r2, r1, val);
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+ qca8k_mii_write32(bus, 0x10 | r2, r1, val);
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ret = qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL,
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QCA8K_MDIO_MASTER_BUSY);
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exit:
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/* even if the busy_wait timeouts try to clear the MASTER_EN */
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- qca8k_mii_write32(priv, 0x10 | r2, r1, 0);
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+ qca8k_mii_write32(bus, 0x10 | r2, r1, 0);
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mutex_unlock(&bus->mdio_lock);
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@@ -787,7 +752,7 @@ qca8k_mdio_read(struct qca8k_priv *priv,
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if (ret)
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goto exit;
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- qca8k_mii_write32(priv, 0x10 | r2, r1, val);
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+ qca8k_mii_write32(bus, 0x10 | r2, r1, val);
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ret = qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL,
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QCA8K_MDIO_MASTER_BUSY);
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@@ -798,7 +763,7 @@ qca8k_mdio_read(struct qca8k_priv *priv,
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exit:
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/* even if the busy_wait timeouts try to clear the MASTER_EN */
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- qca8k_mii_write32(priv, 0x10 | r2, r1, 0);
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+ qca8k_mii_write32(bus, 0x10 | r2, r1, 0);
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mutex_unlock(&bus->mdio_lock);
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@@ -1914,8 +1879,6 @@ qca8k_sw_probe(struct mdio_device *mdiod
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}
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priv->mdio_cache.page = 0xffff;
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- priv->mdio_cache.lo = 0xffff;
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- priv->mdio_cache.hi = 0xffff;
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/* Check the detected switch id */
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ret = qca8k_read_switch_id(priv);
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--- a/drivers/net/dsa/qca/qca8k.h
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+++ b/drivers/net/dsa/qca/qca8k.h
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@@ -375,11 +375,6 @@ struct qca8k_mdio_cache {
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* mdio writes
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*/
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u16 page;
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-/* lo and hi can also be cached and from Documentation we can skip one
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- * extra mdio write if lo or hi is didn't change.
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- */
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- u16 lo;
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- u16 hi;
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};
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struct qca8k_priv {
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