Build system: x86_64 Build-tested: bcm2708, bcm2709, bcm2710, bcm2711 Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B Signed-off-by: Marty Jones <mj8263788@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
		
			
				
	
	
		
			65 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			65 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
From 9ed9132402b92d1957927c8719f37d8b95bb00ff Mon Sep 17 00:00:00 2001
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From: neocortex-vision <oss@neocortexvision.com>
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Date: Thu, 28 Oct 2021 17:37:36 +0100
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Subject: [PATCH] media: i2c: imx477: Add vsync trigger_mode parameter
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trigger_mode == 0 (default) => no effect / no registers written
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trigger_mode == 1           => source
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trigger_mode == 2           => sink
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This can be set e.g. in /boot/cmdline.txt as imx477.trigger_mode=N
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Signed-off-by: Jonas Jacob <jonas.jacob@neocortexvision.com>
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---
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 drivers/media/i2c/imx477.c | 25 +++++++++++++++++++++++++
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 1 file changed, 25 insertions(+)
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--- a/drivers/media/i2c/imx477.c
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+++ b/drivers/media/i2c/imx477.c
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@@ -25,6 +25,10 @@ static int dpc_enable = 1;
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 module_param(dpc_enable, int, 0644);
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 MODULE_PARM_DESC(dpc_enable, "Enable on-sensor DPC");
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+static int trigger_mode;
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+module_param(trigger_mode, int, 0644);
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+MODULE_PARM_DESC(trigger_mode, "Set vsync trigger mode: 1=source, 2=sink");
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+
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 #define IMX477_REG_VALUE_08BIT		1
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 #define IMX477_REG_VALUE_16BIT		2
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@@ -98,6 +102,12 @@ MODULE_PARM_DESC(dpc_enable, "Enable on-
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 #define IMX477_TEST_PATTERN_B_DEFAULT	0
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 #define IMX477_TEST_PATTERN_GB_DEFAULT	0
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+/* Trigger mode */
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+#define IMX477_REG_MC_MODE		0x3f0b
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+#define IMX477_REG_MS_SEL		0x3041
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+#define IMX477_REG_XVS_IO_CTRL		0x3040
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+#define IMX477_REG_EXTOUT_EN		0x4b81
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+
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 /* Embedded metadata stream structure */
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 #define IMX477_EMBEDDED_LINE_WIDTH 16384
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 #define IMX477_NUM_EMBEDDED_LINES 1
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@@ -1721,6 +1731,21 @@ static int imx477_start_streaming(struct
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 	imx477_write_reg(imx477, 0x0b05, IMX477_REG_VALUE_08BIT, !!dpc_enable);
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 	imx477_write_reg(imx477, 0x0b06, IMX477_REG_VALUE_08BIT, !!dpc_enable);
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+	/* Set vsync trigger mode */
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+	if (trigger_mode != 0) {
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+		/* trigger_mode == 1 for source, 2 for sink */
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+		const u32 val = (trigger_mode == 1) ? 1 : 0;
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+
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+		imx477_write_reg(imx477, IMX477_REG_MC_MODE,
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+				 IMX477_REG_VALUE_08BIT, 1);
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+		imx477_write_reg(imx477, IMX477_REG_MS_SEL,
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+				 IMX477_REG_VALUE_08BIT, val);
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+		imx477_write_reg(imx477, IMX477_REG_XVS_IO_CTRL,
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+				 IMX477_REG_VALUE_08BIT, val);
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+		imx477_write_reg(imx477, IMX477_REG_EXTOUT_EN,
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+				 IMX477_REG_VALUE_08BIT, val);
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+	}
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+
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 	/* Apply customized values from user */
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 	ret =  __v4l2_ctrl_handler_setup(imx477->sd.ctrl_handler);
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 	if (ret)
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