d3a337a592
* updated SNAND/SNFI driver brings support for MT7981 * add support for MediaTek NAND Memory bad Block Management (NMBM) (not used for any boards atm, but could be useful in future) * wire up NMBM support for MT7622, MT7629, MT7981 and MT7986 * replace some local patches with updated version from SDK * bring some legacy precompiler symbols which haven't been converted into Kconfig symbols in U-Boot 2022.07, remove when bumbping to U-Boot 2022.10: 100-28-include-configs-mt7986-h-from-SDK.patch Source: https://github.com/mtk-openwrt/u-boot Signed-off-by: Daniel Golle <daniel@makrotopia.org>
224 lines
4.9 KiB
Diff
224 lines
4.9 KiB
Diff
From d5841f8707dcb7a1f73607de67ab45dba93a56a4 Mon Sep 17 00:00:00 2001
|
|
From: Weijie Gao <weijie.gao@mediatek.com>
|
|
Date: Fri, 29 Jul 2022 17:04:12 +0800
|
|
Subject: [PATCH 55/71] board: mt7981: add reference board using new spi-nand
|
|
driver
|
|
|
|
Add a new reference board using new spi-nand driver for SPI-NAND flash on
|
|
SNFI interface
|
|
|
|
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
|
|
---
|
|
arch/arm/dts/Makefile | 1 +
|
|
arch/arm/dts/mt7981-snfi-nand-rfb.dts | 132 +++++++++++++++++++++++++
|
|
configs/mt7981_snfi_nand_rfb_defconfig | 57 +++++++++++
|
|
3 files changed, 190 insertions(+)
|
|
create mode 100644 arch/arm/dts/mt7981-snfi-nand-rfb.dts
|
|
create mode 100644 configs/mt7981_snfi_nand_rfb_defconfig
|
|
|
|
--- a/arch/arm/dts/Makefile
|
|
+++ b/arch/arm/dts/Makefile
|
|
@@ -1206,6 +1206,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
|
|
mt7623n-bananapi-bpi-r2.dtb \
|
|
mt7629-rfb.dtb \
|
|
mt7981-rfb.dtb \
|
|
+ mt7981-snfi-nand-rfb.dtb \
|
|
mt7981-emmc-rfb.dtb \
|
|
mt7981-sd-rfb.dtb \
|
|
mt7986a-rfb.dtb \
|
|
--- /dev/null
|
|
+++ b/arch/arm/dts/mt7981-snfi-nand-rfb.dts
|
|
@@ -0,0 +1,132 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+/*
|
|
+ * Copyright (c) 2021 MediaTek Inc.
|
|
+ * Author: Sam Shih <sam.shih@mediatek.com>
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+#include "mt7981.dtsi"
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+/ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ model = "mt7981-rfb";
|
|
+ compatible = "mediatek,mt7981", "mediatek,mt7981-rfb";
|
|
+ chosen {
|
|
+ stdout-path = &uart0;
|
|
+ tick-timer = &timer0;
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart1_pins>;
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+ð {
|
|
+ status = "okay";
|
|
+ mediatek,gmac-id = <0>;
|
|
+ phy-mode = "sgmii";
|
|
+ mediatek,switch = "mt7531";
|
|
+ reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ snfi_pins: snfi-pins-func-1 {
|
|
+ mux {
|
|
+ function = "flash";
|
|
+ groups = "snfi";
|
|
+ };
|
|
+
|
|
+ clk {
|
|
+ pins = "SPI0_CLK";
|
|
+ drive-strength = <MTK_DRIVE_8mA>;
|
|
+ bias-pull-down = <MTK_PUPD_SET_R1R0_00>;
|
|
+ };
|
|
+
|
|
+ conf-pu {
|
|
+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
|
|
+ drive-strength = <MTK_DRIVE_6mA>;
|
|
+ bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
|
|
+ };
|
|
+
|
|
+ conf-pd {
|
|
+ pins = "SPI0_MOSI", "SPI0_MISO";
|
|
+ drive-strength = <MTK_DRIVE_6mA>;
|
|
+ bias-pull-down = <MTK_PUPD_SET_R1R0_00>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spic_pins: spi1-pins-func-1 {
|
|
+ mux {
|
|
+ function = "spi";
|
|
+ groups = "spi1_1";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ uart1_pins: spi1-pins-func-3 {
|
|
+ mux {
|
|
+ function = "uart";
|
|
+ groups = "uart1_2";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* pin15 as pwm0 */
|
|
+ one_pwm_pins: one-pwm-pins {
|
|
+ mux {
|
|
+ function = "pwm";
|
|
+ groups = "pwm0_1";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* pin15 as pwm0 and pin14 as pwm1 */
|
|
+ two_pwm_pins: two-pwm-pins {
|
|
+ mux {
|
|
+ function = "pwm";
|
|
+ groups = "pwm0_1", "pwm1_0";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* pin15 as pwm0, pin14 as pwm1, pin7 as pwm2 */
|
|
+ three_pwm_pins: three-pwm-pins {
|
|
+ mux {
|
|
+ function = "pwm";
|
|
+ groups = "pwm0_1", "pwm1_0", "pwm2";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mmc0_pins_default: mmc0default {
|
|
+ mux {
|
|
+ function = "flash";
|
|
+ groups = "emmc_45";
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&snand {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&snfi_pins>;
|
|
+ status = "okay";
|
|
+ quad-spi;
|
|
+};
|
|
+
|
|
+&pwm {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&two_pwm_pins>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&watchdog {
|
|
+ status = "disabled";
|
|
+};
|
|
--- /dev/null
|
|
+++ b/configs/mt7981_snfi_nand_rfb_defconfig
|
|
@@ -0,0 +1,57 @@
|
|
+CONFIG_ARM=y
|
|
+CONFIG_POSITION_INDEPENDENT=y
|
|
+CONFIG_ARCH_MEDIATEK=y
|
|
+CONFIG_SYS_TEXT_BASE=0x41e00000
|
|
+CONFIG_SYS_MALLOC_F_LEN=0x4000
|
|
+CONFIG_NR_DRAM_BANKS=1
|
|
+CONFIG_ENV_SIZE=0x20000
|
|
+CONFIG_DEFAULT_DEVICE_TREE="mt7981-snfi-nand-rfb"
|
|
+CONFIG_TARGET_MT7981=y
|
|
+CONFIG_DEBUG_UART_BASE=0x11002000
|
|
+CONFIG_DEBUG_UART_CLOCK=40000000
|
|
+CONFIG_SYS_LOAD_ADDR=0x46000000
|
|
+CONFIG_DEBUG_UART=y
|
|
+# CONFIG_AUTOBOOT is not set
|
|
+CONFIG_DEFAULT_FDT_FILE="mt7981-snfi-nand-rfb"
|
|
+CONFIG_LOGLEVEL=7
|
|
+CONFIG_LOG=y
|
|
+CONFIG_SYS_PROMPT="MT7981> "
|
|
+CONFIG_SYS_CBSIZE=512
|
|
+CONFIG_SYS_PBSIZE=1049
|
|
+# CONFIG_BOOTM_NETBSD is not set
|
|
+# CONFIG_BOOTM_PLAN9 is not set
|
|
+# CONFIG_BOOTM_RTEMS is not set
|
|
+# CONFIG_BOOTM_VXWORKS is not set
|
|
+# CONFIG_CMD_ELF is not set
|
|
+# CONFIG_CMD_UNLZ4 is not set
|
|
+# CONFIG_CMD_UNZIP is not set
|
|
+CONFIG_CMD_GPIO=y
|
|
+CONFIG_CMD_MTD=y
|
|
+CONFIG_CMD_PING=y
|
|
+CONFIG_CMD_SMC=y
|
|
+CONFIG_MTDIDS_DEFAULT="spi-nand0=spi-nand0"
|
|
+CONFIG_MTDPARTS_DEFAULT="spi-nand0:1024k(bl2),512k(u-boot-env),2048k(factory),2048k(fip),65536k(ubi)"
|
|
+CONFIG_CMD_UBI=y
|
|
+CONFIG_CMD_UBI_RENAME=y
|
|
+CONFIG_ENV_OVERWRITE=y
|
|
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
|
+CONFIG_NET_RANDOM_ETHADDR=y
|
|
+CONFIG_REGMAP=y
|
|
+CONFIG_SYSCON=y
|
|
+CONFIG_CLK=y
|
|
+# CONFIG_MMC is not set
|
|
+CONFIG_MTD=y
|
|
+CONFIG_DM_MTD=y
|
|
+CONFIG_MTK_SPI_NAND=y
|
|
+CONFIG_MTK_SPI_NAND_MTD=y
|
|
+CONFIG_PHY_FIXED=y
|
|
+CONFIG_DM_ETH=y
|
|
+CONFIG_MEDIATEK_ETH=y
|
|
+CONFIG_PINCTRL=y
|
|
+CONFIG_PINCONF=y
|
|
+CONFIG_PINCTRL_MT7981=y
|
|
+CONFIG_POWER_DOMAIN=y
|
|
+CONFIG_MTK_POWER_DOMAIN=y
|
|
+CONFIG_DM_SERIAL=y
|
|
+CONFIG_MTK_SERIAL=y
|
|
+CONFIG_HEXDUMP=y
|