9e5d743422
All patches automatically rebased. Build system: x86_64 Build-tested: ipq806x/R7800 Signed-off-by: John Audia <therealgraysky@proton.me>
139 lines
4.9 KiB
Diff
139 lines
4.9 KiB
Diff
From 4fd59792097a6b2fb949d41264386a7ecade469e Mon Sep 17 00:00:00 2001
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From: DENG Qingfang <dqfext@gmail.com>
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Date: Mon, 25 Jan 2021 12:20:46 +0800
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Subject: [PATCH] net: ethernet: mediatek: support setting MTU
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MT762x HW, except for MT7628, supports frame length up to 2048
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(maximum length on GDM), so allow setting MTU up to 2030.
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Also set the default frame length to the hardware default 1518.
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Signed-off-by: DENG Qingfang <dqfext@gmail.com>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Link: https://lore.kernel.org/r/20210125042046.5599-1-dqfext@gmail.com
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/ethernet/mediatek/mtk_eth_soc.c | 43 ++++++++++++++++++---
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drivers/net/ethernet/mediatek/mtk_eth_soc.h | 12 ++++--
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2 files changed, 47 insertions(+), 8 deletions(-)
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -355,7 +355,7 @@ static void mtk_mac_config(struct phylin
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/* Setup gmac */
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mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
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mcr_new = mcr_cur;
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- mcr_new |= MAC_MCR_MAX_RX_1536 | MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE |
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+ mcr_new |= MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE |
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MAC_MCR_BACKOFF_EN | MAC_MCR_BACKPR_EN | MAC_MCR_FORCE_LINK;
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/* Only update control register when needed! */
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@@ -782,8 +782,8 @@ static void mtk_get_stats64(struct net_d
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static inline int mtk_max_frag_size(int mtu)
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{
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/* make sure buf_size will be at least MTK_MAX_RX_LENGTH */
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- if (mtu + MTK_RX_ETH_HLEN < MTK_MAX_RX_LENGTH)
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- mtu = MTK_MAX_RX_LENGTH - MTK_RX_ETH_HLEN;
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+ if (mtu + MTK_RX_ETH_HLEN < MTK_MAX_RX_LENGTH_2K)
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+ mtu = MTK_MAX_RX_LENGTH_2K - MTK_RX_ETH_HLEN;
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return SKB_DATA_ALIGN(MTK_RX_HLEN + mtu) +
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SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
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@@ -794,7 +794,7 @@ static inline int mtk_max_buf_size(int f
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int buf_size = frag_size - NET_SKB_PAD - NET_IP_ALIGN -
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SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
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- WARN_ON(buf_size < MTK_MAX_RX_LENGTH);
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+ WARN_ON(buf_size < MTK_MAX_RX_LENGTH_2K);
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return buf_size;
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}
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@@ -2626,6 +2626,35 @@ static void mtk_uninit(struct net_device
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mtk_rx_irq_disable(eth, ~0);
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}
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+static int mtk_change_mtu(struct net_device *dev, int new_mtu)
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+{
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+ int length = new_mtu + MTK_RX_ETH_HLEN;
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+ struct mtk_mac *mac = netdev_priv(dev);
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+ struct mtk_eth *eth = mac->hw;
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+ u32 mcr_cur, mcr_new;
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+
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+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
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+ mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
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+ mcr_new = mcr_cur & ~MAC_MCR_MAX_RX_MASK;
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+
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+ if (length <= 1518)
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+ mcr_new |= MAC_MCR_MAX_RX(MAC_MCR_MAX_RX_1518);
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+ else if (length <= 1536)
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+ mcr_new |= MAC_MCR_MAX_RX(MAC_MCR_MAX_RX_1536);
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+ else if (length <= 1552)
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+ mcr_new |= MAC_MCR_MAX_RX(MAC_MCR_MAX_RX_1552);
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+ else
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+ mcr_new |= MAC_MCR_MAX_RX(MAC_MCR_MAX_RX_2048);
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+
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+ if (mcr_new != mcr_cur)
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+ mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id));
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+ }
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+
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+ dev->mtu = new_mtu;
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+
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+ return 0;
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+}
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+
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static int mtk_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
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{
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struct mtk_mac *mac = netdev_priv(dev);
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@@ -2922,6 +2951,7 @@ static const struct net_device_ops mtk_n
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.ndo_set_mac_address = mtk_set_mac_address,
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.ndo_validate_addr = eth_validate_addr,
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.ndo_do_ioctl = mtk_do_ioctl,
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+ .ndo_change_mtu = mtk_change_mtu,
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.ndo_tx_timeout = mtk_tx_timeout,
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.ndo_get_stats64 = mtk_get_stats64,
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.ndo_fix_features = mtk_fix_features,
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@@ -3024,7 +3054,10 @@ static int mtk_add_mac(struct mtk_eth *e
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eth->netdev[id]->irq = eth->irq[0];
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eth->netdev[id]->dev.of_node = np;
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- eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH - MTK_RX_ETH_HLEN;
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+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
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+ eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH - MTK_RX_ETH_HLEN;
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+ else
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+ eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH_2K - MTK_RX_ETH_HLEN;
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return 0;
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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@@ -20,12 +20,13 @@
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#include "mtk_ppe.h"
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#define MTK_QDMA_PAGE_SIZE 2048
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-#define MTK_MAX_RX_LENGTH 1536
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+#define MTK_MAX_RX_LENGTH 1536
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+#define MTK_MAX_RX_LENGTH_2K 2048
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#define MTK_TX_DMA_BUF_LEN 0x3fff
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#define MTK_DMA_SIZE 512
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#define MTK_NAPI_WEIGHT 64
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#define MTK_MAC_COUNT 2
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-#define MTK_RX_ETH_HLEN (VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)
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+#define MTK_RX_ETH_HLEN (ETH_HLEN + ETH_FCS_LEN)
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#define MTK_RX_HLEN (NET_SKB_PAD + MTK_RX_ETH_HLEN + NET_IP_ALIGN)
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#define MTK_DMA_DUMMY_DESC 0xffffffff
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#define MTK_DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | \
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@@ -352,7 +353,12 @@
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/* Mac control registers */
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#define MTK_MAC_MCR(x) (0x10100 + (x * 0x100))
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-#define MAC_MCR_MAX_RX_1536 BIT(24)
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+#define MAC_MCR_MAX_RX_MASK GENMASK(25, 24)
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+#define MAC_MCR_MAX_RX(_x) (MAC_MCR_MAX_RX_MASK & ((_x) << 24))
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+#define MAC_MCR_MAX_RX_1518 0x0
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+#define MAC_MCR_MAX_RX_1536 0x1
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+#define MAC_MCR_MAX_RX_1552 0x2
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+#define MAC_MCR_MAX_RX_2048 0x3
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#define MAC_MCR_IPG_CFG (BIT(18) | BIT(16))
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#define MAC_MCR_FORCE_MODE BIT(15)
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#define MAC_MCR_TX_EN BIT(14)
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