30d2fcffeb
The prerequisite DSA changes for the nice RTL8366RB improvements are already backported so bring back these changes as well. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
116 lines
3.5 KiB
Diff
116 lines
3.5 KiB
Diff
From 831a3d26bea0d14f8563eecf96def660a74a3000 Mon Sep 17 00:00:00 2001
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From: Linus Walleij <linus.walleij@linaro.org>
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Date: Tue, 5 Oct 2021 21:47:02 +0200
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Subject: [PATCH 08/11] net: dsa: rtl8366rb: Support disabling learning
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The RTL8366RB hardware supports disabling learning per-port
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so let's make use of this feature. Rename some unfortunately
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named registers in the process.
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Suggested-by: Vladimir Oltean <olteanv@gmail.com>
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Cc: Alvin Šipraga <alsi@bang-olufsen.dk>
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Cc: Mauri Sandberg <sandberg@mailfence.com>
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Cc: Florian Fainelli <f.fainelli@gmail.com>
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Cc: DENG Qingfang <dqfext@gmail.com>
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Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/dsa/rtl8366rb.c | 50 ++++++++++++++++++++++++++++++++-----
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1 file changed, 44 insertions(+), 6 deletions(-)
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--- a/drivers/net/dsa/rtl8366rb.c
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+++ b/drivers/net/dsa/rtl8366rb.c
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@@ -14,6 +14,7 @@
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#include <linux/bitops.h>
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#include <linux/etherdevice.h>
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+#include <linux/if_bridge.h>
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#include <linux/interrupt.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip/chained_irq.h>
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@@ -42,9 +43,12 @@
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/* Port Enable Control register */
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#define RTL8366RB_PECR 0x0001
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-/* Switch Security Control registers */
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-#define RTL8366RB_SSCR0 0x0002
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-#define RTL8366RB_SSCR1 0x0003
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+/* Switch per-port learning disablement register */
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+#define RTL8366RB_PORT_LEARNDIS_CTRL 0x0002
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+
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+/* Security control, actually aging register */
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+#define RTL8366RB_SECURITY_CTRL 0x0003
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+
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#define RTL8366RB_SSCR2 0x0004
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#define RTL8366RB_SSCR2_DROP_UNKNOWN_DA BIT(0)
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@@ -927,13 +931,14 @@ static int rtl8366rb_setup(struct dsa_sw
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/* layer 2 size, see rtl8366rb_change_mtu() */
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rb->max_mtu[i] = 1532;
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- /* Enable learning for all ports */
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- ret = regmap_write(smi->map, RTL8366RB_SSCR0, 0);
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+ /* Disable learning for all ports */
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+ ret = regmap_write(smi->map, RTL8366RB_PORT_LEARNDIS_CTRL,
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+ RTL8366RB_PORT_ALL);
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if (ret)
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return ret;
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/* Enable auto ageing for all ports */
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- ret = regmap_write(smi->map, RTL8366RB_SSCR1, 0);
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+ ret = regmap_write(smi->map, RTL8366RB_SECURITY_CTRL, 0);
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if (ret)
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return ret;
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@@ -1272,6 +1277,37 @@ static int rtl8366rb_vlan_filtering(stru
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return ret;
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}
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+static int
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+rtl8366rb_port_pre_bridge_flags(struct dsa_switch *ds, int port,
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+ struct switchdev_brport_flags flags,
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+ struct netlink_ext_ack *extack)
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+{
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+ /* We support enabling/disabling learning */
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+ if (flags.mask & ~(BR_LEARNING))
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+ return -EINVAL;
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+
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+ return 0;
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+}
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+
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+static int
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+rtl8366rb_port_bridge_flags(struct dsa_switch *ds, int port,
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+ struct switchdev_brport_flags flags,
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+ struct netlink_ext_ack *extack)
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+{
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+ struct realtek_smi *smi = ds->priv;
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+ int ret;
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+
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+ if (flags.mask & BR_LEARNING) {
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+ ret = regmap_update_bits(smi->map, RTL8366RB_PORT_LEARNDIS_CTRL,
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+ BIT(port),
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+ (flags.val & BR_LEARNING) ? 0 : BIT(port));
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+ if (ret)
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+ return ret;
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+ }
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+
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+ return 0;
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+}
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+
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static int rtl8366rb_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
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{
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struct realtek_smi *smi = ds->priv;
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@@ -1682,6 +1718,8 @@ static const struct dsa_switch_ops rtl83
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.port_vlan_del = rtl8366_vlan_del,
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.port_enable = rtl8366rb_port_enable,
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.port_disable = rtl8366rb_port_disable,
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+ .port_pre_bridge_flags = rtl8366rb_port_pre_bridge_flags,
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+ .port_bridge_flags = rtl8366rb_port_bridge_flags,
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.port_change_mtu = rtl8366rb_change_mtu,
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.port_max_mtu = rtl8366rb_max_mtu,
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};
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