45dbd65850
Add compatible strings to all mt7621 based device tree source files to fix formal issues. Signed-off-by: L. D. Pinney <ldpinney@gmail.com>
159 lines
2.5 KiB
Plaintext
159 lines
2.5 KiB
Plaintext
/dts-v1/;
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "netgear,r6220", "mediatek,mt7621-soc";
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model = "Netgear R6220";
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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};
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chosen {
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bootargs = "console=ttyS0,57600";
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};
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gpio-leds {
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compatible = "gpio-leds";
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power {
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label = "r6220:green:power";
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gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
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};
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usb {
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label = "r6220:green:usb";
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gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
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};
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internet {
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label = "r6220:green:wan";
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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};
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wifi {
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label = "r6220:green:wifi";
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gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "r6220:green:wps";
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gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <20>;
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wps {
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label = "wps";
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gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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wifi {
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label = "wifi";
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gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
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linux,code = <KEY_RFKILL>;
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};
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reset {
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label = "reset";
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gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
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linux,code = <KEY_RESTART>;
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};
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};
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gpio_export {
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compatible = "gpio-export";
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#size-cells = <0>;
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usbpower {
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gpio-export,name = "usbpower";
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gpio-export,output = <1>;
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gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&nand {
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status = "okay";
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x100000>;
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read-only;
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};
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partition@100000 {
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label = "SC PID";
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reg = <0x100000 0x100000>;
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read-only;
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};
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partition@200000 {
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label = "kernel";
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reg = <0x200000 0x400000>;
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};
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partition@600000 {
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label = "ubi";
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reg = <0x600000 0x1c00000>;
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};
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factory: partition@2e00000 {
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label = "factory";
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reg = <0x2e00000 0x100000>;
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read-only;
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};
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partition@4200000 {
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label = "reserved";
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reg = <0x4200000 0x3c00000>;
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read-only;
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};
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};
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&pcie {
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status = "okay";
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pcie0 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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device_type = "pci";
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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pcie1 {
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mt76@1,0 {
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reg = <0x0000 0 0 0 0>;
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device_type = "pci";
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mediatek,mtd-eeprom = <&factory 0x0000>;
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ieee80211-freq-limit = <2400000 2500000>;
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};
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};
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};
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ðernet {
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mtd-mac-address = <&factory 0x00000004>;
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};
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&pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "uart3", "jtag";
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ralink,function = "gpio";
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};
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};
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};
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