 d7e41df24a
			
		
	
	d7e41df24a
	
	
	
		
			
			This drops built-in support for USB 2.0 PHY and starts using separated driver that was upstreamed & backported some time ago. Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
		
			
				
	
	
		
			137 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			137 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From e8624859dde2ad07633dac7ec86629a516411ea1 Mon Sep 17 00:00:00 2001
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| From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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| Date: Wed, 21 Sep 2016 18:01:43 +0200
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| Subject: [PATCH] USB: bcma: drop Northstar PHY 2.0 initialization code
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| MIME-Version: 1.0
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| Content-Type: text/plain; charset=UTF-8
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| Content-Transfer-Encoding: 8bit
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| 
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| This driver should initialize controller only, PHY initialization should
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| be handled by separated PHY driver. We already have phy-bcm-ns-usb2 in
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| place so let it makes its duty.
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| 
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| Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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| ---
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|  drivers/usb/host/bcma-hcd.c | 80 ++++++++++++++-------------------------------
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|  1 file changed, 25 insertions(+), 55 deletions(-)
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| 
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| --- a/drivers/usb/host/bcma-hcd.c
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| +++ b/drivers/usb/host/bcma-hcd.c
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| @@ -239,44 +239,10 @@ static int bcma_hcd_usb20_old_arm_init(s
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|  	return 0;
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|  }
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|  
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| -static void bcma_hcd_init_chip_arm_phy(struct bcma_device *dev)
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| -{
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| -	struct bcma_device *arm_core;
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| -	void __iomem *dmu;
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| -
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| -	arm_core = bcma_find_core(dev->bus, BCMA_CORE_ARMCA9);
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| -	if (!arm_core) {
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| -		dev_err(&dev->dev, "can not find ARM Cortex A9 ihost core\n");
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| -		return;
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| -	}
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| -
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| -	dmu = ioremap_nocache(arm_core->addr_s[0], 0x1000);
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| -	if (!dmu) {
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| -		dev_err(&dev->dev, "can not map ARM Cortex A9 ihost core\n");
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| -		return;
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| -	}
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| -
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| -	/* Unlock DMU PLL settings */
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| -	iowrite32(0x0000ea68, dmu + 0x180);
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| -
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| -	/* Write USB 2.0 PLL control setting */
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| -	iowrite32(0x00dd10c3, dmu + 0x164);
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| -
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| -	/* Lock DMU PLL settings */
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| -	iowrite32(0x00000000, dmu + 0x180);
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| -
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| -	iounmap(dmu);
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| -}
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| -
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| -static void bcma_hcd_init_chip_arm_hc(struct bcma_device *dev)
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| +static void bcma_hcd_usb20_ns_init_hc(struct bcma_device *dev)
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|  {
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|  	u32 val;
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|  
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| -	/*
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| -	 * Delay after PHY initialized to ensure HC is ready to be configured
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| -	 */
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| -	usleep_range(1000, 2000);
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| -
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|  	/* Set packet buffer OUT threshold */
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|  	val = bcma_read32(dev, 0x94);
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|  	val &= 0xffff;
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| @@ -287,20 +253,33 @@ static void bcma_hcd_init_chip_arm_hc(st
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|  	val = bcma_read32(dev, 0x9c);
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|  	val |= 1;
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|  	bcma_write32(dev, 0x9c, val);
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| +
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| +	/*
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| +	 * Broadcom initializes PHY and then waits to ensure HC is ready to be
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| +	 * configured. In our case the order is reversed. We just initialized
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| +	 * controller and we let HCD initialize PHY, so let's wait (sleep) now.
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| +	 */
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| +	usleep_range(1000, 2000);
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|  }
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|  
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| -static void bcma_hcd_init_chip_arm(struct bcma_device *dev)
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| +/**
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| + * bcma_hcd_usb20_ns_init - Initialize Northstar USB 2.0 controller
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| + */
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| +static int bcma_hcd_usb20_ns_init(struct bcma_hcd_device *bcma_hcd)
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|  {
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| -	bcma_core_enable(dev, 0);
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| +	struct bcma_device *core = bcma_hcd->core;
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| +	struct bcma_chipinfo *ci = &core->bus->chipinfo;
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| +	struct device *dev = &core->dev;
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| +
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| +	bcma_core_enable(core, 0);
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|  
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| -	if (dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM4707 ||
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| -	    dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM53018) {
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| -		if (dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4707 ||
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| -		    dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4708)
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| -			bcma_hcd_init_chip_arm_phy(dev);
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| +	if (ci->id == BCMA_CHIP_ID_BCM4707 ||
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| +	    ci->id == BCMA_CHIP_ID_BCM53018)
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| +		bcma_hcd_usb20_ns_init_hc(core);
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|  
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| -		bcma_hcd_init_chip_arm_hc(dev);
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| -	}
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| +	of_platform_default_populate(dev->of_node, NULL, dev);
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| +
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| +	return 0;
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|  }
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|  
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|  static void bcma_hci_platform_power_gpio(struct bcma_device *dev, bool val)
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| @@ -373,16 +352,7 @@ static int bcma_hcd_usb20_init(struct bc
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|  	if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32)))
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|  		return -EOPNOTSUPP;
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|  
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| -	switch (dev->id.id) {
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| -	case BCMA_CORE_NS_USB20:
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| -		bcma_hcd_init_chip_arm(dev);
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| -		break;
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| -	case BCMA_CORE_USB20_HOST:
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| -		bcma_hcd_init_chip_mips(dev);
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| -		break;
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| -	default:
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| -		return -ENODEV;
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| -	}
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| +	bcma_hcd_init_chip_mips(dev);
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|  
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|  	/* In AI chips EHCI is addrspace 0, OHCI is 1 */
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|  	ohci_addr = dev->addr_s[0];
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| @@ -451,7 +421,7 @@ static int bcma_hcd_probe(struct bcma_de
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|  			err = -ENOTSUPP;
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|  		break;
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|  	case BCMA_CORE_NS_USB20:
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| -		err = bcma_hcd_usb20_init(usb_dev);
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| +		err = bcma_hcd_usb20_ns_init(usb_dev);
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|  		break;
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|  	case BCMA_CORE_NS_USB30:
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|  		err = bcma_hcd_usb30_init(usb_dev);
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