mediatek: add support for ipTIME AX3000SM
Specification
-------------
- SoC : MediaTek MT7981BA dual-core ARM Cortex-A53 1.3GHz
- RAM : DDR3 256Mbytes, Nanya Technology NT5CC128M16IP
- Flash : 128Mbytes NAND Flash, ESMT F50L1G41LB
- WLAN : MediaTek MT7976CN dual-band Wi-Fi 6
- 2.4GHz : b/g/n/ax, MU-MIMO
- 5GHz : a/n/ac/ax, MU-MIMO
- Ethernet : 10/100/1000 Mbps x4, LAN (MediaTek MT7531AE)
10/100/1000 Mbps x1, WAN (MT7981 internal PHY)
- UART : 1x4 pin header on PCB
- [J500] 3.3V, TX, RX, GND (115200, 8N1)
- Buttons : WPS, Reset
- LEDs : 1x Power (Amber)
1x CPU (Amber)
1x Wi-Fi 5GHz (Amber)
1x Wi-Fi 2.4GHz (Amber)
1x WAN activity (Amber)
4x LAN activity (Amber)
- Power : 12VDC, 1A (Center positive polarity)
MAC address
-----------
+-----------+-------------------+-----------+
| Interface | MAC | Algorithm |
+-----------+-------------------+-----------+
| WLAN 2.4G | B0:38:6C:xx:xx:xx | label |
| WLAN 5G | B2:38:6C:4x:xx:xx | |
| WAN | B0:38:6C:xx:xx:xx | label + 1 |
| LAN | B0:38:6C:xx:xx:xx | label + 3 |
+-----------+-------------------+-----------+
The WLAN 2.4G MAC address was found in 'Factory' partition, 0x4
Installation
------------
1. Download the *initramfs-kernel.bin file from the OpenWrt website
2. Attach UART to the router, and interrupt the boot process by pressing '0'
If you successfully interrupt the boot process, a terminal prompt
name should look like this:
MT7981>
3. Connect the router(LAN port) to the PC
4. Assign the PC IP address: 192.168.0.100/24
5. Load and run the *initramfs-kernel.bin:
tftpboot 0x46000000 initramfs-kernel.bin
bootm
6. Upload the OpenWrt *squashfs-sysupgrade.bin to the router
7. Run 'sysupgrade -n' with the sysupgrade OpenWrt image
Signed-off-by: Donghyun Ko <nyankosoftware@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18689
(Cherry picked from commit 1c6cb6d5be)
Link: https://github.com/openwrt/openwrt/pull/19410
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Donghyun Ko
committed by
Hauke Mehrtens
Hauke Mehrtens
parent
791c0ad7c4
commit
25467b09f1
279
target/linux/mediatek/dts/mt7981b-iptime-ax3000sm.dts
Normal file
279
target/linux/mediatek/dts/mt7981b-iptime-ax3000sm.dts
Normal file
@@ -0,0 +1,279 @@
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// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include "mt7981.dtsi"
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/ {
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model = "ipTIME AX3000SM";
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compatible = "iptime,ax3000sm", "mediatek,mt7981";
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aliases {
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serial0 = &uart0;
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label-mac-device = &gmac1;
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led-boot = &led_cpu;
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led-failsafe = &led_cpu;
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led-running = &led_cpu;
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led-upgrade = &led_cpu;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-0 {
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label = "wps";
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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debounce-interval = <60>;
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};
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button-1 {
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label = "reset";
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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debounce-interval = <60>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led-0 {
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color = <LED_COLOR_ID_AMBER>;
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function = LED_FUNCTION_WAN;
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gpios = <&pio 8 GPIO_ACTIVE_LOW>;
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};
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led-1 {
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color = <LED_COLOR_ID_AMBER>;
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function = LED_FUNCTION_WLAN_2GHZ;
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gpios = <&pio 34 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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led-2 {
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color = <LED_COLOR_ID_AMBER>;
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function = LED_FUNCTION_WLAN_5GHZ;
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gpios = <&pio 35 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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led_cpu: led-3 {
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color = <LED_COLOR_ID_AMBER>;
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function = LED_FUNCTION_CPU;
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gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_factory_4 (3)>;
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "gmii";
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phy-handle = <&int_gbe_phy>;
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_factory_4 (1)>;
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};
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};
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&mdio_bus {
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <0x1f>;
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reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_flash_pins>;
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status = "okay";
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spi_nand@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-tx-buswidth = <4>;
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spi-rx-buswidth = <4>;
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spi-cal-enable;
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spi-cal-mode = "read-data";
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spi-cal-datalen = <7>;
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spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4e 0x41 0x4e 0x44>;
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spi-cal-addrlen = <5>;
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spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
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mediatek,nmbm;
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mediatek,bmt-max-ratio = <1>;
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mediatek,bmt-max-reserved-blocks = <64>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "BL2";
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reg = <0x0 0x100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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reg = <0x100000 0x80000>;
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};
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partition@180000 {
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label = "Factory";
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reg = <0x180000 0x200000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x1000>;
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};
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macaddr_factory_4: macaddr@4 {
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compatible = "mac-base";
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reg = <0x4 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@380000 {
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label = "FIP";
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reg = <0x380000 0x200000>;
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read-only;
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};
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partition@580000 {
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label = "ubi";
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reg = <0x580000 0x6E00000>;
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};
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};
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};
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan4";
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};
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port@1 {
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reg = <1>;
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label = "lan3";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan1";
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};
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port@6 {
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reg = <6>;
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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&pio {
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spi0_flash_pins: spi0-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <MTK_DRIVE_4mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <MTK_DRIVE_4mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&wifi {
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status = "okay";
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nvmem-cell-names = "eeprom";
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nvmem-cells = <&eeprom_factory_0>;
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band@0 {
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reg = <0>;
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nvmem-cells = <&macaddr_factory_4 (0)>;
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nvmem-cell-names = "mac-address";
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};
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band@1 {
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reg = <1>;
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nvmem-cells = <&macaddr_factory_4 (0)>;
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nvmem-cell-names = "mac-address";
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};
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};
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@@ -64,6 +64,9 @@ glinet,gl-xe3000)
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huasifei,wh3000)
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ucidef_set_led_netdev "wan" "WAN" "red:wan" "eth1" "link tx rx"
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;;
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iptime,ax3000sm)
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ucidef_set_led_netdev "wan" "wan" "amber:wan" "eth1" "link tx rx"
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;;
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mercusys,mr80x-v3)
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ucidef_set_led_netdev "lan1" "lan-1" "green:lan-1" "lan1" "link tx rx"
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ucidef_set_led_netdev "lan2" "lan-2" "green:lan-2" "lan2" "link tx rx"
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@@ -46,6 +46,7 @@ mediatek_setup_interfaces()
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ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan
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;;
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asus,tuf-ax4200|\
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iptime,ax3000sm|\
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jdcloud,re-cp-03|\
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mediatek,mt7981-rfb|\
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netcore,n60|\
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@@ -108,6 +108,11 @@ case "$board" in
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[ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
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[ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress
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;;
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iptime,ax3000sm)
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addr=$(mtd_get_mac_binary "Factory" 0x4)
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[ "$PHYNBR" = "1" ] && macaddr_setbit_la $(macaddr_unsetbit $(macaddr_unsetbit $(macaddr_unsetbit $(macaddr_setbit $addr 26) 25) 27) 28) > \
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/sys${DEVPATH}/macaddress
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;;
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jcg,q30-pro|\
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netcore,n60)
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# Originally, phy1 is phy0 mac with LA bit set. However, this would conflict
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@@ -1031,6 +1031,17 @@ define Device/huasifei_wh3000
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endef
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TARGET_DEVICES += huasifei_wh3000
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define Device/iptime_ax3000sm
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DEVICE_VENDOR := ipTIME
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DEVICE_MODEL := AX3000SM
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DEVICE_DTS := mt7981b-iptime-ax3000sm
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DEVICE_DTS_DIR := ../dts
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DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
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IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
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SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb
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endef
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TARGET_DEVICES += iptime_ax3000sm
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define Device/jcg_q30-pro
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DEVICE_VENDOR := JCG
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DEVICE_MODEL := Q30 PRO
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